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1. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-6911-8
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2. 
Cover image for Ultra-thin Chip Technology and Applications
Ultra-thin Chip Technology and Applications
Author 
Burghartz, Joachim. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7276-7
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3. 
Cover image for Processor and System-on-Chip Simulation
Processor and System-on-Chip Simulation
Author 
Leupers, Rainer. editor. Temam, Olivier. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6175-4
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4. 
Cover image for Full-Chip Nanometer Routing Techniques
Full-Chip Nanometer Routing Techniques
Author 
Ho, Tsung-Yi. author. Chang, Yao-Wen. author. Chen, Sao-Jie. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-6195-0
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5. 
Cover image for Error Control for Network-on-Chip Links
Error Control for Network-on-Chip Links
Author 
Fu, Bo. author. Ampadu, Paul. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9313-7
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6. 
Cover image for Reliability, Availability and Serviceability of Networks-on-Chip
Reliability, Availability and Serviceability of Networks-on-Chip
Author 
Cota, Érika. author. Morais Amory, Alexandre. author. Soares Lubaszewski, Marcelo. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-0791-1
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7. 
Cover image for On-Chip Interconnect with aelite Composable and Predictable Systems
On-Chip Interconnect with aelite Composable and Predictable Systems
Author 
Hansson, Andreas. author. Goossens, Kees. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6865-4
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8. 
Cover image for On-Chip Instrumentation Design and Debug for Systems on Chip
On-Chip Instrumentation Design and Debug for Systems on Chip
Author 
Stollon, Neal. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7563-8
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9. 
Cover image for Multiprocessor System-on-Chip Hardware Design and Tool Integration
Multiprocessor System-on-Chip Hardware Design and Tool Integration
Author 
Hübner, Michael. editor. Becker, Jürgen. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6460-1
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10. 
Cover image for On and Off-Chip Crosstalk Avoidance in VLSI Design
On and Off-Chip Crosstalk Avoidance in VLSI Design
Author 
Duan, Chunjie. author. LaMeres, Brock J. author. Khatri, Sunil P. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-0947-3
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11. 
Cover image for VLSI Design for Video Coding H.264/AVC Encoding from Standard Specification to Chip
VLSI Design for Video Coding H.264/AVC Encoding from Standard Specification to Chip
Author 
Lin, Youn-Long Steve. author. Kao, Chao-Yang. author. Kuo, Hung-Chih. author. Chen, Jian-Wen. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-0959-6
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12. 
Cover image for Embedded Software Design and Programming of Multiprocessor System-on-Chip Simulink and System C Case Studies
Embedded Software Design and Programming of Multiprocessor System-on-Chip Simulink and System C Case Studies
Author 
Popovici, Katalin. author. Rousseau, Frédéric. author. Jerraya, Ahmed A. author. Wolf, Marilyn. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-5567-8
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13. 
Cover image for Power Distribution Networks with On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors
Author 
Popovich, Mikhhail. author. Mezhiba, Andrey V. author. Friedman, Eby G. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-71601-5
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14. 
Cover image for Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Author 
Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-4826-2
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