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1. 
Cover image for Design and test technology for dependable systems-on-chip
Design and test technology for dependable systems-on-chip
Author 
Ubar, Raimund, 1941- Raik, Jaan, 1972- Vierhaus, Heinrich Theodor, 1951-
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ONLINE
Electronic Access 
EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=329154
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2. 
Cover image for System-on-chip test architectures nanometer design for testability
System-on-chip test architectures nanometer design for testability
Author 
Wang, Laung-Terng. Stroud, Charles E. Touba, Nur A.
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780123739735
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3. 
Cover image for Verification techniques for system-level design
Verification techniques for system-level design
Author 
Fujita, Masahiro, 1956- Ghosh, Indradeep, 1970- Prasad, Mukul.
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780123706164
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Online Library~1
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