Limit Search Results
Author
Language
Subject
Material Type
Shelf Location
Library
Switch to list view
Switch to thumbnail view
Select an Action
2 Results Found Subscribe to search results
00DEFAULT
Print
1. 
Cover image for Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Author 
Noia, Brandon. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-02378-6
Format: 
Availability 
Online Library~1
Available:
Copies:
2. 
Cover image for Testing for small-delay defects in nanoscale CMOS integrated circuits
Testing for small-delay defects in nanoscale CMOS integrated circuits
Author 
Goel, Sandeep K, editor of compilation. Chakrabarty, Krishnendu, editor of compilation.
Preferred Shelf Number 
ONLINE(342881.1)
Electronic Access 
Distributed by publisher. Purchase or institutional license may be required for access.
Format: 
Availability 
Online Library~1
Available:
Copies: