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Cover image for Computer Safety, Reliability, and Security SAFECOMP 2018 Workshops, ASSURE, DECSoS, SASSUR, STRIVE, and WAISE, Västerås, Sweden, September 18, 2018, Proceedings
Computer Safety, Reliability, and Security SAFECOMP 2018 Workshops, ASSURE, DECSoS, SASSUR, STRIVE, and WAISE, Västerås, Sweden, September 18, 2018, Proceedings
Author 
Gallina, Barbara. editor. (orcid)0000-0002-6952-1053 Skavhaug, Amund. editor. Schoitsch, Erwin. editor. (orcid)0000-0002-0335-5443 Bitsch, Friedemann. editor. (orcid)0000-0001-6152-4121 SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-99229-7
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2. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
Author 
Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)
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ONLINE(335669.1)
Electronic Access 
http://dx.doi.org/10.1007/978-90-481-9644-9
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