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Cover image for Transactions on High-Performance Embedded Architectures and Compilers V
Transactions on High-Performance Embedded Architectures and Compilers V
Author 
Silvano, Cristina. editor. (orcid)0000-0003-1668-0883 Bertels, Koen. editor. (orcid)0000-0001-9310-4885 Schulte, Michael. editor. (orcid)0000-0002-0213-4155 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-662-58834-5
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2. 
Cover image for VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
Author 
Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651 Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669 Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850 Monteiro, José. editor. (orcid)0000-0003-0603-2268
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https://doi.org/10.1007/978-3-030-15663-3
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3. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Author 
Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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