Switch to list view
Switch to thumbnail view
Select an Action
6 Results Found Subscribe to search results
000000DEFAULT
Print
1. 
Cover image for Digital Phase Lock Loops Architectures and Applications
Digital Phase Lock Loops Architectures and Applications
Author 
Al-araji, Saleh R. author. Hussain, Zahir M. author. Al-qutayri, Mahmoud A. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-32864-5
Format: 
Availability 
Online Library~1
Available:
Copies:
2. 
Cover image for Gizopoulos / Advances in ElectronicTesting
Gizopoulos / Advances in ElectronicTesting
Author 
Gizopoulos, Dimitris. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-29409-0
Format: 
Availability 
Online Library~1
Available:
Copies:
3. 
Cover image for Writing Testbenches using System Verilog
Writing Testbenches using System Verilog
Author 
Bergeron, Janick. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-31275-7
Format: 
Availability 
Online Library~1
Available:
Copies:
4. 
Cover image for AmIware Hardware Technology Drivers of Ambient Intelligence
AmIware Hardware Technology Drivers of Ambient Intelligence
Author 
Mukherjee, Satyen. editor. Aarts, Ronald M. editor. Roovers, Raf. editor. Widdershoven, Frans. editor. Ouwerkerk, Martin. editor.
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-4198-5
Format: 
Availability 
Online Library~1
Available:
Copies:
5. 
Cover image for Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Author 
Vachoux, A. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-4998-9
Format: 
Availability 
Online Library~1
Available:
Copies:
6. 
Cover image for TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
Author 
GRABINSKI, WLADYSLAW. editor. NAUWELAERS, BART. editor. SCHREURS, DOMINIQUE. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-4556-5
Format: 
Availability 
Online Library~1
Available:
Copies: