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Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
Author 
Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-95948-9
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2. 
Cover image for Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
Author 
Kaeli, David. editor. Sachs, Kai. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-93799-9
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3. 
Cover image for Embedded Memories for Nano-Scale VLSIs
Embedded Memories for Nano-Scale VLSIs
Author 
Zhang, Kevin. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-88497-4
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4. 
Cover image for Embedded multiprocessors scheduling and synchronization
Embedded multiprocessors scheduling and synchronization
Author 
Sriram, Sundararajan, 1968- Bhattacharyya, Shuvra S., 1968-
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