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1. 
Cover image for System design for telecommunication gateways
System design for telecommunication gateways
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Bachmutsky, Alexander. Wiley InterScience (Online service)
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Books24x7 http://www.books24x7.com/marc.asp?bookid=40974
John Wiley http://dx.doi.org/10.1002/9780470710746
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Cover image for Computer system design system-on-chip
Computer system design system-on-chip
Author 
Flynn, M. J. (Michael J.), 1934- Luk, Wayne.
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Wiley InterScience An electronic book accessible through the World Wide Web; click for information
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MyiLibrary, Table of contents http://www.myilibrary.com?id=315735&ref=toc
http://site.ebrary.com/lib/alltitles/Doc?id=10481079
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3. 
Cover image for Essentials of thermal system design and optimization
Essentials of thermal system design and optimization
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Balaji, C.
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TJ260 B35 2011
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4. 
Cover image for Pharmaceutical water system design, operation, and validation
Pharmaceutical water system design, operation, and validation
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Collentro, William V., author.
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Cover image for Energy-Aware System Design Algorithms and Architectures
Energy-Aware System Design Algorithms and Architectures
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Kyung, Chong-Min. editor. Yoo, Sungjoo. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-1679-7
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6. 
Cover image for The Automotive Body Volume II: System Design
The Automotive Body Volume II: System Design
Author 
Morello, Lorenzo. author. Rossini, Lorenzo Rosti. author. Pia, Giuseppe. author. Tonoli, Andrea. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-0516-6
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Cover image for Large-scale solar power system design an engineering guide for grid-connected solar power generation
Large-scale solar power system design an engineering guide for grid-connected solar power generation
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Gevorkian, Peter.
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Cover image for Sustainable energy system engineering the complete green building design resource
Sustainable energy system engineering the complete green building design resource
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Gevorkian, Peter.
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9. 
Cover image for Verilog digital system design RT level synthesis, testbench, and verification
Verilog digital system design RT level synthesis, testbench, and verification
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Navabi, Zainalabedin.
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10. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
Author 
Ayala, José L. editor. García-Cámara, Braulio. editor. Prieto, Manuel. editor. Ruggiero, Martino. editor. Sicard, Gilles. editor.
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11. 
Cover image for Analog circuit and system design : a tutorial guide to applications and solutions / edited by Bob Dobkin, Jim Williams.
Analog circuit and system design : a tutorial guide to applications and solutions / edited by Bob Dobkin, Jim Williams.
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Dobkin, Bob. Williams, Jim.
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TK7867 A5425 2011
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12. 
Cover image for Three Dimensional System Integration IC Stacking Process and Design
Three Dimensional System Integration IC Stacking Process and Design
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Papanikolaou, Antonis. editor. Soudris, Dimitrios. editor. Radojcic, Riko. editor. SpringerLink (Online service)
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