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1. 
Cover image for Verilog digital system design RT level synthesis, testbench, and verification
Verilog digital system design RT level synthesis, testbench, and verification
Author 
Navabi, Zainalabedin.
Preferred Shelf Number 
ONLINE
Electronic Access 
Subscription required
Format: 
Availability 
Online Library~1
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2. 
Cover image for Digital design, with RTL design, VHDL, and Verilog
Digital design, with RTL design, VHDL, and Verilog
Author 
Vahid, Frank.
Preferred Shelf Number 
TK7888.3 V34 2011
Format: 
Availability 
Beytepe Library~2
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3. 
Cover image for Advanced digital design with the Verilog HDL
Advanced digital design with the Verilog HDL
Author 
Ciletti, Michael D.
Preferred Shelf Number 
TK7885.7 C5485 2011
Format: 
Availability 
Beytepe Library~1
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