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1. 
Cover image for Advanced Digital System Design A Practical Guide to Verilog Based FPGA and ASIC Implementation
Advanced Digital System Design A Practical Guide to Verilog Based FPGA and ASIC Implementation
Author 
Roy, Shirshendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-41085-7
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2. 
Cover image for Simplicity is Complex Foundations of Cyber-Physical System Design
Simplicity is Complex Foundations of Cyber-Physical System Design
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Kopetz, Hermann. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-20411-2
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3. 
Cover image for VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers
VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers
Author 
Hollstein, Thomas. editor. Raik, Jaan. editor. Kostin, Sergei. editor. Tšertov, Anton. editor. O'Connor, Ian. editor.
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https://doi.org/10.1007/978-3-319-67104-8
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4. 
Cover image for System Level Design from HW/SW to Memory for Embedded Systems 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings
System Level Design from HW/SW to Memory for Embedded Systems 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings
Author 
Götz, Marcelo. editor. Schirner, Gunar. editor. Wehrmeister, Marco Aurélio. editor. Al Faruque, Mohammad Abdullah. editor. Rettberg, Achim. editor.
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https://doi.org/10.1007/978-3-319-90023-0
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5. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2014
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2014
Author 
Oppenheimer, Frank. editor. Medina Pasaje, Julio Luis. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-24457-0
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6. 
Cover image for Software Design for Resilient Computer Systems
Software Design for Resilient Computer Systems
Author 
Schagaev, Igor. author. Gutknecht, Jürg. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-55139-0
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7. 
Cover image for Hardware Security A Look into the Future
Hardware Security A Look into the Future
Author 
Tehranipoor, Mark. author. Zamiri Azar, Kimia. author. Asadizanjani, Navid. author. (orcid)0000-0003-3347-5072 Rahman, Fahim. author. Mardani Kamali, Hadi. author.
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https://doi.org/10.1007/978-3-031-58687-3
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8. 
Cover image for Intelligent Computing, Smart Communication and Network Technologies First International Conference, ICICSCNT 2023, Chennai, India, May 17-18, 2023, Proceedings
Intelligent Computing, Smart Communication and Network Technologies First International Conference, ICICSCNT 2023, Chennai, India, May 17-18, 2023, Proceedings
Author 
Dassan, Paulraj. editor. (orcid)0000-0002-8853-9945 Thirumaaran, Sethukarasi. editor. (orcid)0000-0002-9433-2609 Subramani, Neelakandan. editor. (orcid)0000-0003-2337-8471 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-75957-4
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9. 
Cover image for Autonomous driving algorithms and Its IC Design
Autonomous driving algorithms and Its IC Design
Author 
Ren, Jianfeng. author. Xia, Dong. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-99-2897-2
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10. 
Cover image for Advanced Multicore Systems-On-Chip Architecture, On-Chip Network, Design
Advanced Multicore Systems-On-Chip Architecture, On-Chip Network, Design
Author 
Ben Abdallah, Abderazek. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-6092-2
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11. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
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Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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12. 
Cover image for New methods to engineer and seamlessly reconfigure time triggered Ethernet based systems during runtime based on the PROFINET IRT example
New methods to engineer and seamlessly reconfigure time triggered Ethernet based systems during runtime based on the PROFINET IRT example
Author 
Wisniewski, Lukasz. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-662-54650-5
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