Title:
On-Chip Training NPU - Algorithm, Architecture and SoC Design
Author:
Han, Donghyeon. author.
ISBN:
9783031342370
Edition:
1st ed. 2023.
Physical Description:
XXIII, 237 p. 234 illus., 213 illus. in color. online resource.
Contents:
Chapter 1 Introduction -- Chapter 2 A Theoretical Study on Artificial Intelligence Training -- Chapter 3 New Algorithm 1: Binary Direct Feedback Alignment for Fully-Connected layer -- Chapter 4 New Algorithm 2: Extension of Direct Feedback Alignment to Convolutional Recurrent Neural Network -- Chapter 5 DF-LNPU: A Pipelined Direct Feedback Alignment based Deep Neural Network Learning Processor for Fast Online Learning -- Chapter 6 HNPU-V1: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-point and Active Bit-precision Searching -- Chapter 7 HNPU-V2: An Energy-efficient DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation -- Chapter 8 An Overview of Energy-efficient DNN Training Processors -- Chapter 9 Conclusion.
Added Author:
Added Corporate Author:
Electronic Access:
https://doi.org/10.1007/978-3-031-34237-0Copies:
Available:*
Library | Material Type | Item Barcode | Shelf Number | Status | Item Holds |
---|---|---|---|---|---|
Searching... | E-Book | 527363-1001 | ONLINE | Searching... | Searching... |