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1. 
Cover image for Quick Start Guide to VHDL
Quick Start Guide to VHDL
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-04516-6
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Cover image for Euro-Par 2019: Parallel Processing 25th International Conference on Parallel and Distributed Computing, Göttingen, Germany, August 26–30, 2019, Proceedings
Euro-Par 2019: Parallel Processing 25th International Conference on Parallel and Distributed Computing, Göttingen, Germany, August 26–30, 2019, Proceedings
Author 
Yahyapour, Ramin. editor. (orcid)0000-0002-9057-4395 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-29400-7
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Cover image for Introduction to Digital Systems Design
Introduction to Digital Systems Design
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Donzellini, Giuliano. author. Oneto, Luca. author. Ponta, Domenico. author. Anguita, Davide. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-92804-3
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Cover image for Tools and Algorithms for the Construction and Analysis of Systems 25th International Conference, TACAS 2019, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2019, Prague, Czech Republic, April 6–11, 2019, Proceedings, Part II
Tools and Algorithms for the Construction and Analysis of Systems 25th International Conference, TACAS 2019, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2019, Prague, Czech Republic, April 6–11, 2019, Proceedings, Part II
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Vojnar, Tomáš. editor. (orcid)0000-0002-2746-8792 Zhang, Lijun. editor. (orcid)0000-0002-3692-2088 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-17465-1
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5. 
Cover image for Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
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Fornaciari, William. editor. Soudris, Dimitrios. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-91962-1
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6. 
Cover image for Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
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Izadian, Afshin. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02484-0
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7. 
Cover image for Applied Computer Sciences in Engineering 6th Workshop on Engineering Applications, WEA 2019, Santa Marta, Colombia, October 16–18, 2019, Proceedings
Applied Computer Sciences in Engineering 6th Workshop on Engineering Applications, WEA 2019, Santa Marta, Colombia, October 16–18, 2019, Proceedings
Author 
Figueroa-García, Juan Carlos. editor. (orcid)0000-0001-5544-5937 Duarte-González, Mario. editor. Jaramillo-Isaza, Sebastián. editor. (orcid)0000-0002-2134-772X Orjuela-Cañon, Alvaro David. editor. (orcid)0000-0002-2057-7603 Díaz-Gutierrez, Yesid. editor.
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https://doi.org/10.1007/978-3-030-31019-6
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8. 
Cover image for Computer Science – CACIC 2018 24th Argentine Congress, Tandil, Argentina, October 8–12, 2018, Revised Selected Papers
Computer Science – CACIC 2018 24th Argentine Congress, Tandil, Argentina, October 8–12, 2018, Revised Selected Papers
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Pesado, Patricia. editor. (orcid)0000-0003-0000-3482 Aciti, Claudio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-20787-8
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9. 
Cover image for OpenMP: Conquering the Full Hardware Spectrum 15th International Workshop on OpenMP, IWOMP 2019, Auckland, New Zealand, September 11–13, 2019, Proceedings
OpenMP: Conquering the Full Hardware Spectrum 15th International Workshop on OpenMP, IWOMP 2019, Auckland, New Zealand, September 11–13, 2019, Proceedings
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Fan, Xing. editor. de Supinski, Bronis R. editor. Sinnen, Oliver. editor. Giacaman, Nasser. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-28596-8
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10. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
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Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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11. 
Cover image for Quick Start Guide to Verilog
Quick Start Guide to Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-10552-5
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12. 
Cover image for Supercomputing 4th Russian Supercomputing Days, RuSCDays 2018, Moscow, Russia, September 24–25, 2018, Revised Selected Papers
Supercomputing 4th Russian Supercomputing Days, RuSCDays 2018, Moscow, Russia, September 24–25, 2018, Revised Selected Papers
Author 
Voevodin, Vladimir. editor. (orcid)0000-0001-6036-5106 Sobolev, Sergey. editor. (orcid)0000-0002-3474-8696 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-05807-4
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