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Subject: Logic design.

Author

SpringerLink (Online service)

(7)

Reis, Ricardo. editor.

(2)

Austin, Todd. editor.

(1)

Bombieri, Nicola. editor.

(1)

Boning, Duane S. editor.

(1)

Chattopadhyay, Sanatan. editor.

(1)

Chattopadhyay, Santanu. editor.

(1)

Choy, Oliver C. S. editor.

(1)

Elfadel, Ibrahim (Abe) M. editor.

(1)

Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987

(1)

Fujita, Masahiro. editor.

(1)

Hu, Jin. author.

(1)

Kahng, Andrew B. author.

(1)

Li, Xin. editor.

(1)

Lienig, Jens. author.

(1)

Lim, Sung Kyu. author.

(1)

Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651

(1)

Markov, Igor L. author.

(1)

Mir, Salvador. editor.

(1)

Monteiro, José. editor. (orcid)0000-0003-0603-2268

(1)

Pravadelli, Graziano. editor.

(1)

Rahaman, Hafizur. editor.

(1)

Reis, Ricardo. editor. (orcid)0000-0001-5781-5858

(1)

Russell, Gordon, ed.

(1)

Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669

(1)

Taylor, Gaynor, ed.

(1)

Tsui, Chi-Ying. editor.

(1)

Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850

(1)

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(2)

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(1)

(1)

Subject

Operating systems (Computers).

(3)

Computer organization.

(2)

Computer science.

(2)

Computer software.

(2)

(2)

Software engineering.

(2)

Systems engineering.

(2)

Application software.

(1)

Application-specific integrated circuits.

(1)

Artificial intelligence.

(1)

Computer Communication Networks.

(1)

Computer aided design.

(1)

Computer hardware.

(1)

Computer network architectures.

(1)

Data structures (Computer science).

(1)

(1)

Digital integrated circuits.

(1)

Discrete cosine transforms.

(1)

Electronic circuits--Testing.

(1)

Electronic circuits.

(1)

(1)

Expert systems (Computer science).

(1)

Integrated circuits--Design and construction.

(1)

Integrated circuits--Testing.

(1)

Integrated circuits--Very large scale integration.

(1)

Linear integrated circuits.

(1)

Logic circuits--Computer-aided design.

(1)

Microprocessors.

(1)

Microprogramming .

(1)

Simulated annealing (Mathematics).

(1)

Material Type

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1.

Cover image for Machine Learning in VLSI Computer-Aided Design

Machine Learning in VLSI Computer-Aided Design

Machine Learning in VLSI Computer-Aided Design

Author

Elfadel, Ibrahim (Abe) M. editor. Boning, Duane S. editor. Li, Xin. editor. SpringerLink (Online service)

Preferred Shelf Number

ONLINE

Electronic Access

https://doi.org/10.1007/978-3-030-04666-8

Format:

Availability

Online Library~1

Available:
Copies:

2.

Cover image for Practical Problems in VLSI Physical Design Automation

Practical Problems in VLSI Physical Design Automation

Practical Problems in VLSI Physical Design Automation

Author

Lim, Sung Kyu. author. SpringerLink (Online service)

Preferred Shelf Number

ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-1-4020-6627-6

Format:

Availability

Online Library~1

Available:
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3.

Cover image for Algorithmic and Knowledge-based CAD for VLSI

Algorithmic and Knowledge-based CAD for VLSI

Algorithmic and Knowledge-based CAD for VLSI

Author

Taylor, Gaynor, ed. Russell, Gordon, ed.

Preferred Shelf Number

ONLINE

Electronic Access

http://dx.doi.org/10.1049/PBCS004E

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4.

Cover image for VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers

VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers

VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers

Author

Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651 Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669 Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850 Monteiro, José. editor. (orcid)0000-0003-0603-2268

Preferred Shelf Number

ONLINE

Electronic Access

https://doi.org/10.1007/978-3-030-15663-3

Format:

Availability

Online Library~1

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5.

Cover image for VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers

VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers

VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers

Author

Bombieri, Nicola. editor. Pravadelli, Graziano. editor. Fujita, Masahiro. editor. Austin, Todd. editor. Reis, Ricardo. editor.

Preferred Shelf Number

ONLINE

Electronic Access

https://doi.org/10.1007/978-3-030-23425-6

Format:

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Online Library~1

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6.

Cover image for VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

Author

Mir, Salvador. editor. Tsui, Chi-Ying. editor. Reis, Ricardo. editor. Choy, Oliver C. S. editor. SpringerLink (Online service)

Preferred Shelf Number

ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-32770-4

Format:

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Online Library~1

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7.

Cover image for Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings

Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings

Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings

Author

Rahaman, Hafizur. editor. Chattopadhyay, Sanatan. editor. Chattopadhyay, Santanu. editor. SpringerLink (Online service)

Preferred Shelf Number

ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-31494-0

Format:

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Online Library~1

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8.

Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure

VLSI Physical Design: From Graph Partitioning to Timing Closure

VLSI Physical Design: From Graph Partitioning to Timing Closure

Author

Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)

Preferred Shelf Number

ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-90-481-9591-6

Format:

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