Flip-Flop Design in Nanometer CMOS From High Speed to Low Energy

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Title:

Author:

Alioto, Massimo. author.

ISBN:

9783319019970

Edition:

1st ed. 2015.

Physical Description:

XV, 260 p. 123 illus., 5 illus. in color. online resource.

Contents:

The Logical Effort Method -- Design in the Energy-Delay Space -- Clocked Storage Elements -- Flip-Flop Optimized Design -- Analysis and Comparison in the Energy-Delay-Area Domain -- Energy Efficiency Versus Clock Slope -- Hold Time Issues and Impact of variations on Flip-Flop Topologies -- Ultra-Fast and Energy-Efficient Pulsed Latch Topologies.

Subject Term:

Electronic circuits.

Microprocessors.

Computer architecture.

Microtechnology.

Microelectromechanical systems.

Electronic Circuits and Systems.

Processor Architectures.

Microsystems and MEMS.

Added Author:

Consoli, Elio.

Palumbo, Gaetano.