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1. 
Cover image for A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof
A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof
Author 
Kovalev, Mikhail. author. Müller, Silvia M. author. Paul, Wolfgang J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-13906-7
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2. 
Cover image for Physical Layer Multi-Core Prototyping A Dataflow-Based Approach for LTE eNodeB
Physical Layer Multi-Core Prototyping A Dataflow-Based Approach for LTE eNodeB
Author 
Pelcat, Maxime. author. Aridhi, Slaheddine. author. Piat, Jonathan. author. Nezan, Jean-François. author. SpringerLink (Online service)
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ONLINE(330930.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4471-4210-2
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3. 
Cover image for A Practical Programming Model for the Multi-Core Era 3rd International Workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007 Proceedings
A Practical Programming Model for the Multi-Core Era 3rd International Workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007 Proceedings
Author 
Chapman, Barbara. editor. Zheng, Weiming. editor. Gao, Guang R. editor. Sato, Mitsuhisa. editor. Ayguadé, Eduard. editor.
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ONLINE
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http://dx.doi.org/10.1007/978-3-540-69303-1
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