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13. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
Author 
Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-981-10-7470-7
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14. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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15. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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16. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
Author 
Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-41198-9
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17. 
Cover image for Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Author 
Sklavos, Nicolas. editor. Chaves, Ricardo. editor. Di Natale, Giorgio. editor. Regazzoni, Francesco. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-44318-8
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18. 
Cover image for Computing Platforms for Software-Defined Radio
Computing Platforms for Software-Defined Radio
Author 
Hussain, Waqar. editor. Nurmi, Jari. editor. Isoaho, Jouni. editor. Garzia, Fabio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49679-5
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19. 
Cover image for OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
Author 
Maruyama, Naoya. editor. de Supinski, Bronis R. editor. Wahib, Mohamed. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-45550-1
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20. 
Cover image for Digital design, with RTL design, VHDL, and Verilog
Digital design, with RTL design, VHDL, and Verilog
Author 
Vahid, Frank.
Preferred Shelf Number 
TK7888.3 V34 2011
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21. 
Cover image for Computer organization, design, and architecture
Computer organization, design, and architecture
Author 
Shiva, Sajjan G., author. Shiva, Sajjan G. Computer design and architecture.
Preferred Shelf Number 
TK7885 .S525 2008
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