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13. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-43946-9
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14. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42547-9
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15. 
Cover image for Integrated Electronic Circuits
Integrated Electronic Circuits
Author 
Atallah, Jad G. author. Ismail, Mohammed. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-62707-1
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16. 
Cover image for Embedded Systems Design using the MSP430FR2355 LaunchPad™
Embedded Systems Design using the MSP430FR2355 LaunchPad™
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-20888-1
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17. 
Cover image for Deep Reinforcement Learning Processor Design for Mobile Applications
Deep Reinforcement Learning Processor Design for Mobile Applications
Author 
Lee, Juhyoung. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36793-9
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18. 
Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
Embedded Systems Design with Special Arithmetic and Number Systems
Author 
Molahosseini, Amir Sabbagh. editor. de Sousa, Leonel Seabra. editor. (orcid)0000-0002-8066-221X Chang, Chip-Hong. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49742-6
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19. 
Cover image for Scaling OpenMP for Exascale Performance and Portability 13th International Workshop on OpenMP, IWOMP 2017, Stony Brook, NY, USA, September 20-22, 2017, Proceedings
Scaling OpenMP for Exascale Performance and Portability 13th International Workshop on OpenMP, IWOMP 2017, Stony Brook, NY, USA, September 20-22, 2017, Proceedings
Author 
de Supinski, Bronis R. editor. Olivier, Stephen L. editor. Terboven, Christian. editor. Chapman, Barbara M. editor. Müller, Matthias S. editor.
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https://doi.org/10.1007/978-3-319-65578-9
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20. 
Cover image for High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
Author 
Kunkel, Julian M. editor. Yokota, Rio. editor. Balaji, Pavan. editor. Keyes, David. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-58667-0
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21. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
Author 
Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49025-0
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22. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
Author 
Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50057-7
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23. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
Author 
Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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24. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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