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13. 
Cover image for Optimized ASIP Synthesis from Architecture Description Language Models
Optimized ASIP Synthesis from Architecture Description Language Models
Author 
Schliebusch, Oliver. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5686-4
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14. 
Cover image for FPGA Implementations of Neural Networks
FPGA Implementations of Neural Networks
Author 
Omondi, Amos R. editor. Rajapakse, Jagath C. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-28487-7
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15. 
Cover image for Platform Based Design at the Electronic System Level Industry Perspectives and Experiences
Platform Based Design at the Electronic System Level Industry Perspectives and Experiences
Author 
Burton, Mark. author. Morawiec, Adam. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-5138-7
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16. 
Cover image for Functional Verification of Programmable Embedded Architectures A Top-Down Approach
Functional Verification of Programmable Embedded Architectures A Top-Down Approach
Author 
Mishra, Prabhat. author. Dutt, Nikil D. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b137514
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