Systemverilog for Verification A Guide to Learning the Testbench Language Features

Rapid Prototyping of Digital Systems

Thermal and Power Management of Integrated Circuits

Scalable Hardware Verification with Symbolic Simulation

Embedded System Design

Writing Testbenches using System Verilog

Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, China

Abstraction Refinement for Large Scale Model Checking

The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™

Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity

Leakage in Nanometer CMOS Technologies

The Finite Element Method and Applications in Engineering Using Ansys®