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121. 
Cover image for Einführung in die Halbleiter-Schaltungstechnik
Einführung in die Halbleiter-Schaltungstechnik
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Göbel, Holger. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-3-642-20887-4
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122. 
Cover image for Übungsaufgaben zur Halbleiter-Schaltungstechnik
Übungsaufgaben zur Halbleiter-Schaltungstechnik
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Göbel, Holger. author. Siemund, Henning. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-21011-2
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123. 
Cover image for Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings
Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings
Author 
Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-15739-4
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124. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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125. 
Cover image for Introduction to digital systems modeling, synthesis, and simulation using VHDL
Introduction to digital systems modeling, synthesis, and simulation using VHDL
Author 
Ferdjallah, Mohammed.
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EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=382054
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126. 
Cover image for Advanced digital design with the Verilog HDL
Advanced digital design with the Verilog HDL
Author 
Ciletti, Michael D.
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TK7885.7 C5485 2011
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127. 
Cover image for Verilog digital system design RT level synthesis, testbench, and verification
Verilog digital system design RT level synthesis, testbench, and verification
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Navabi, Zainalabedin.
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128. 
Cover image for VHDL modular design and synthesis of cores and systems
VHDL modular design and synthesis of cores and systems
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Navabi, Zainalabedin.
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129. 
Cover image for Embedded SOPC design with NIOS II processor and VHDL examples
Embedded SOPC design with NIOS II processor and VHDL examples
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Chu, Pong P., 1959- Wiley InterScience (Online service)
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Wiley InterScience An electronic book accessible through the World Wide Web; click for information
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130. 
Cover image for VHDL for logic synthesis
VHDL for logic synthesis
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Rushton, Andrew.
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Books24x7 http://www.books24x7.com/marc.asp?bookid=41715
John Wiley http://dx.doi.org/10.1002/9781119995852
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131. 
Cover image for Digital design, with RTL design, VHDL, and Verilog
Digital design, with RTL design, VHDL, and Verilog
Author 
Vahid, Frank.
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TK7888.3 V34 2011
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132. 
Cover image for Performance tuning of scientific applications
Performance tuning of scientific applications
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Bailey, David H. Lucas, Robert F. Williams, Samuel Watkins.
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Q183.9 .P47 2011
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