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13. 
Cover image for Design for Manufacturability and Yield for Nano-Scale CMOS
Design for Manufacturability and Yield for Nano-Scale CMOS
Author 
Chiang, Charles C. author. Kawa, Jamil. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4020-5188-3
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14. 
Cover image for CMOS Current-Mode Circuits for Data Communications
CMOS Current-Mode Circuits for Data Communications
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-47691-9
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15. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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16. 
Cover image for A Roadmap for Formal Property Verification
A Roadmap for Formal Property Verification
Author 
DasGupta, Pallab. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4758-9
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17. 
Cover image for Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Author 
Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/1-4020-4826-2
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18. 
Cover image for Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
Author 
Lienig, Jens. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/3-540-29942-4
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19. 
Cover image for Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Author 
Leventhal, Roy G. author. Green, Lynne. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b104647
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20. 
Cover image for Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility
Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility
Author 
Ben Dhia, Sonia. editor. Ramdani, Mohamed. editor. Sicard, Etienne. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b137864
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21. 
Cover image for Leakage in Nanometer CMOS Technologies
Leakage in Nanometer CMOS Technologies
Author 
Narendra, Siva G. author. Chandrakasan, Anantha. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-28133-9
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22. 
Cover image for Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
Author 
CASTRO-LÓPEZ, R. author. FERNÁNDEZ, F.V. author. GUERRA-VINUESA, O. author. RODRÍGUEZ-VÁZQUEZ, Á. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5139-5
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23. 
Cover image for Verification Methodology Manual for SystemVerilog
Verification Methodology Manual for SystemVerilog
Author 
Bergeron, Janick. author. Cerny, Eduard. author. Hunter, Alan. author. Nightingale, Andrew. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b135575
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24. 
Cover image for The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
Author 
Silva, Francisco. author. McLaurin, Teresa. author. Waayers, Tom. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-34609-0
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