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13. 
Cover image for Embedded Memories for Nano-Scale VLSIs
Embedded Memories for Nano-Scale VLSIs
Author 
Zhang, Kevin. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-88497-4
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14. 
Cover image for Magnetic Nanostructures in Modern Technology Spintronics, Magnetic MEMS and Recording
Magnetic Nanostructures in Modern Technology Spintronics, Magnetic MEMS and Recording
Author 
Azzerboni, Bruno. editor. Asti, Giovanni. editor. Pareti, Luigi. editor. Ghidini, Massimo. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-6338-1
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15. 
Cover image for CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
Author 
Pavlov, Andrei. author. Sachdev, Manoj. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-8363-1
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16. 
Cover image for Parallel Processing and Applied Mathematics 7th International Conference, PPAM 2007, Gdansk, Poland, September 9-12, 2007 Revised Selected Papers
Parallel Processing and Applied Mathematics 7th International Conference, PPAM 2007, Gdansk, Poland, September 9-12, 2007 Revised Selected Papers
Author 
Wyrzykowski, Roman. editor. Dongarra, Jack. editor. Karczewski, Konrad. editor. Wasniewski, Jerzy. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-68111-3
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17. 
Cover image for Dynamic Brain - from Neural Spikes to Behaviors 12th International Summer School on Neural Networks, Erice, Italy, December 5-12, 2007, Revised Lectures
Dynamic Brain - from Neural Spikes to Behaviors 12th International Summer School on Neural Networks, Erice, Italy, December 5-12, 2007, Revised Lectures
Author 
Marinaro, Maria. editor. Scarpetta, Silvia. editor. Yamaguchi, Yoko. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-88853-6
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18. 
Cover image for Memories in Wireless Systems
Memories in Wireless Systems
Author 
Micheloni, Rino. editor. Campardo, Giovanni. editor. Olivo, Piero. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-79078-5
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19. 
Cover image for Molecular Electronics Materials, Devices and Applications
Molecular Electronics Materials, Devices and Applications
Author 
Jalabert, Antoine. author. Amara, Amara. author. Clermidy, Fabien. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-8594-9
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20. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Author 
Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-74442-9
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21. 
Cover image for Co-design for System Acceleration A Quantitative Approach
Co-design for System Acceleration A Quantitative Approach
Author 
Nedjah, Nadia. author. Mourelle, Luiza De Macedo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5546-1
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22. 
Cover image for Ultra-Low Voltage Nano-Scale Memories
Ultra-Low Voltage Nano-Scale Memories
Author 
Itoh, Kiyoo. editor. Horiguchi, Masashi. editor. Tanaka, Hitoshi. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68853-4
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23. 
Cover image for Parallel Processing and Applied Mathematics 6th International Conference, PPAM 2005, Poznań, Poland, September 11-14, 2005, Revised Selected Papers
Parallel Processing and Applied Mathematics 6th International Conference, PPAM 2005, Poznań, Poland, September 11-14, 2005, Revised Selected Papers
Author 
Wyrzykowski, Roman. editor. Dongarra, Jack. editor. Meyer, Norbert. editor. Waśniewski, Jerzy. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/11752578
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24. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
Author 
Vounckx, Johan. editor. Azemard, Nadine. editor. Maurine, Philippe. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/11847083
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