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13. 
Cover image for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Author 
Zhang, Chenxin. author. Liu, Liang. author. Öwall, Viktor. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-24004-6
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14. 
Cover image for Design of cost-efficient interconnect processing units : Spidergon STNoC
Design of cost-efficient interconnect processing units : Spidergon STNoC
Author 
Coppola, Marcello.
Preferred Shelf Number 
TK5105.546 .D47 2009
Electronic Access 
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