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13. 
Cover image for Handbook of Hardware/Software Codesign
Handbook of Hardware/Software Codesign
Author 
Ha, Soonhoi. editor. Teich, Jürgen. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-94-017-7267-9
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14. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
Author 
Churiwala, Sanjay. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-42438-5
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15. 
Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
New Data Structures and Algorithms for Logic Synthesis and Verification
Author 
Amaru, Luca Gaetano. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-43174-1
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16. 
Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
Embedded Systems Design with Special Arithmetic and Number Systems
Author 
Molahosseini, Amir Sabbagh. editor. de Sousa, Leonel Seabra. editor. (orcid)0000-0002-8066-221X Chang, Chip-Hong. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49742-6
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17. 
Cover image for Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Author 
Posser, Gracieli. author. Sapatnekar, Sachin S. author. Reis, Ricardo. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-48899-8
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18. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-34195-8
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19. 
Cover image for Hardware Protection through Obfuscation
Hardware Protection through Obfuscation
Author 
Forte, Domenic. editor. Bhunia, Swarup. editor. Tehranipoor, Mark M. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49019-9
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20. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
Author 
Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49025-0
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21. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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22. 
Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
Testing of Interposer-Based 2.5D Integrated Circuits
Author 
Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54714-5
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23. 
Cover image for Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Author 
Chen, Quan. author. Guo, Minyi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-6238-4
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24. 
Cover image for Parallel Sparse Direct Solver for Integrated Circuit Simulation
Parallel Sparse Direct Solver for Integrated Circuit Simulation
Author 
Chen, Xiaoming. author. Wang, Yu. author. Yang, Huazhong. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53429-9
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