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25. 
Cover image for Carbon Nanotubes for Interconnects Process, Design and Applications
Carbon Nanotubes for Interconnects Process, Design and Applications
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Todri-Sanial, Aida. editor. Dijon, Jean. editor. Maffucci, Antonio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-29746-0
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26. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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27. 
Cover image for Model-Implementation Fidelity in Cyber Physical System Design
Model-Implementation Fidelity in Cyber Physical System Design
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Molnos, Anca. editor. Fabre, Christian. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47307-9
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28. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
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Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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29. 
Cover image for RFID Security A Lightweight Paradigm
RFID Security A Lightweight Paradigm
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Khattab, Ahmed. author. Jeddi, Zahra. author. Amini, Esmaeil. author. Bayoumi, Magdy. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47545-5
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30. 
Cover image for Languages and Compilers for Parallel Computing 29th International Workshop, LCPC 2016, Rochester, NY, USA, September 28-30, 2016, Revised Papers
Languages and Compilers for Parallel Computing 29th International Workshop, LCPC 2016, Rochester, NY, USA, September 28-30, 2016, Revised Papers
Author 
Ding, Chen. editor. Criswell, John. editor. Wu, Peng. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-52709-3
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31. 
Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Author 
Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42037-0
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32. 
Cover image for Instruction Level Parallelism
Instruction Level Parallelism
Author 
Aiken, Alex. author. Banerjee, Utpal. author. Kejariwal, Arun. author. Nicolau, Alexandru. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4899-7797-7
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33. 
Cover image for Brain-Inspired Computing Second International Workshop, BrainComp 2015, Cetraro, Italy, July 6-10, 2015, Revised Selected Papers
Brain-Inspired Computing Second International Workshop, BrainComp 2015, Cetraro, Italy, July 6-10, 2015, Revised Selected Papers
Author 
Amunts, Katrin. editor. Grandinetti, Lucio. editor. Lippert, Thomas. editor. Petkov, Nicolai. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50862-7
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34. 
Cover image for Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
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Goossens, Sven. author. Chandrasekar, Karthik. author. Akesson, Benny. author. Goossens, Kees. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-32094-6
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35. 
Cover image for Invasive Tightly Coupled Processor Arrays
Invasive Tightly Coupled Processor Arrays
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LARI, VAHID. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-1058-3
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36. 
Cover image for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
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Zhang, Chenxin. author. Liu, Liang. author. Öwall, Viktor. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-24004-6
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