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1. 
Cover image for 3D TCAD Simulation for Semiconductor Processes, Devices and Optoelectronics
3D TCAD Simulation for Semiconductor Processes, Devices and Optoelectronics
Author 
Li, Simon. author. Fu, Yue. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0481-1
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2. 
Cover image for Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Author 
Ahuja, Sumit. author. Lakshminarayana, Avinash. author. Shukla, Sandeep Kumar. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0872-7
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3. 
Cover image for Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Author 
Shen, Ruijing. author. Tan, Sheldon X.-D. author. Yu, Hao. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0788-1
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4. 
Cover image for Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Author 
Ben Jamaa, M. Haykel. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-0650-7
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5. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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6. 
Cover image for Ultra-thin Chip Technology and Applications
Ultra-thin Chip Technology and Applications
Author 
Burghartz, Joachim. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7276-7
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7. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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8. 
Cover image for Memory-Based Logic Synthesis
Memory-Based Logic Synthesis
Author 
Sasao, Tsutomu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8104-2
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9. 
Cover image for Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Author 
Silvano, Cristina. editor. Fornaciari, William. editor. Villar, Eugenio. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8837-9
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10. 
Cover image for Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Author 
Vasileska, Dragica. editor. Goodnick, Stephen M. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8840-9
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11. 
Cover image for Principles of VLSI RTL Design A Practical Guide
Principles of VLSI RTL Design A Practical Guide
Author 
Churiwala, Sanjay. author. Garg, Sapan. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9296-3
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12. 
Cover image for High-Level Verification Methods and Tools for Verification of System-Level Designs
High-Level Verification Methods and Tools for Verification of System-Level Designs
Author 
Kundu, Sudipta. author. Lerner, Sorin. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9359-5
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