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25. 
Cover image for Reliability, Availability and Serviceability of Networks-on-Chip
Reliability, Availability and Serviceability of Networks-on-Chip
Author 
Cota, Érika. author. Morais Amory, Alexandre. author. Soares Lubaszewski, Marcelo. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-0791-1
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26. 
Cover image for Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Author 
Ahuja, Sumit. author. Lakshminarayana, Avinash. author. Shukla, Sandeep Kumar. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0872-7
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27. 
Cover image for Automated Configuration Problem Solving
Automated Configuration Problem Solving
Author 
Petrie, Charles J. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-4532-6
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28. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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29. 
Cover image for Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Author 
Stanisavljević, Miloš. author. Schmid, Alexandre. author. Leblebici, Yusuf. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6217-1
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30. 
Cover image for On-Chip Interconnect with aelite Composable and Predictable Systems
On-Chip Interconnect with aelite Composable and Predictable Systems
Author 
Hansson, Andreas. author. Goossens, Kees. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6865-4
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31. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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32. 
Cover image for Analog Layout Synthesis A Survey of Topological Approaches
Analog Layout Synthesis A Survey of Topological Approaches
Author 
Graeb, Helmut E. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6932-3
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33. 
Cover image for Multiprocessor System-on-Chip Hardware Design and Tool Integration
Multiprocessor System-on-Chip Hardware Design and Tool Integration
Author 
Hübner, Michael. editor. Becker, Jürgen. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6460-1
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34. 
Cover image for Focal-Plane Sensor-Processor Chips
Focal-Plane Sensor-Processor Chips
Author 
Zarándy, Ákos. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6475-5
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35. 
Cover image for Ultra-thin Chip Technology and Applications
Ultra-thin Chip Technology and Applications
Author 
Burghartz, Joachim. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7276-7
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36. 
Cover image for Dependability in Electronic Systems Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances
Dependability in Electronic Systems Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances
Author 
Kanekawa, Nobuyasu. author. Ibe, Eishi H. author. Suga, Takashi. author. Uematsu, Yutaka. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6715-2
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