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25. 
Cover image for Error Control for Network-on-Chip Links
Error Control for Network-on-Chip Links
Author 
Fu, Bo. author. Ampadu, Paul. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-9313-7
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26. 
Cover image for Reliability, Availability and Serviceability of Networks-on-Chip
Reliability, Availability and Serviceability of Networks-on-Chip
Author 
Cota, Érika. author. Morais Amory, Alexandre. author. Soares Lubaszewski, Marcelo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0791-1
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27. 
Cover image for SystemVerilog for Verification A Guide to Learning the Testbench Language Features
SystemVerilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. Tumbush, Greg. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0715-7
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28. 
Cover image for Low-Power High-Resolution Analog to Digital Converters Design, Test and Calibration
Low-Power High-Resolution Analog to Digital Converters Design, Test and Calibration
Author 
Zjajo, Amir. author. Pineda de Gyvez, José. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9725-5
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29. 
Cover image for Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Author 
Battezzati, Niccolò. author. Sterpone, Luca. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7595-9
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30. 
Cover image for CMOS Circuits for Passive Wireless Microsystems
CMOS Circuits for Passive Wireless Microsystems
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7680-2
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31. 
Cover image for Nanoscale Memory Repair
Nanoscale Memory Repair
Author 
Horiguchi, Masashi. author. Itoh, Kiyoo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7958-2
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32. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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33. 
Cover image for Memory-Based Logic Synthesis
Memory-Based Logic Synthesis
Author 
Sasao, Tsutomu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8104-2
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34. 
Cover image for Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Author 
Okada, Kenichi. editor. Kousai, Shouhei. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8514-9
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35. 
Cover image for The Simple Art of SoC Design Closing the Gap between RTL and ESL
The Simple Art of SoC Design Closing the Gap between RTL and ESL
Author 
Keating, Michael. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8586-6
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36. 
Cover image for High-Level Verification Methods and Tools for Verification of System-Level Designs
High-Level Verification Methods and Tools for Verification of System-Level Designs
Author 
Kundu, Sudipta. author. Lerner, Sorin. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9359-5
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