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25. 
Cover image for Metric- Driven Design Verification An Engineer's and Executive's Guide to First Pass Success
Metric- Driven Design Verification An Engineer's and Executive's Guide to First Pass Success
Author 
Carter, Hamilton B. author. Hemmady, Shankar. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-38152-7
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26. 
Cover image for Physical Design Essentials An ASIC Design Implementation Perspective
Physical Design Essentials An ASIC Design Implementation Perspective
Author 
Golshan, Khosrow. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-46115-1
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27. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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28. 
Cover image for Switched-Capacitor Techniques For High-Accuracy Filter And ADC Design
Switched-Capacitor Techniques For High-Accuracy Filter And ADC Design
Author 
Quinn, Patrick J. author. Roermund, Arthur H. M. Van. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-6258-2
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29. 
Cover image for Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Author 
Vachoux, A. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4998-9
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30. 
Cover image for TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
Author 
GRABINSKI, WLADYSLAW. editor. NAUWELAERS, BART. editor. SCHREURS, DOMINIQUE. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4556-5
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31. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings
Author 
Paliouras, Vassilis. editor. Vounckx, Johan. editor. Verkest, Diederik. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/11556930
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32. 
Cover image for LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers
Author 
Leroux, Paul. author. Steyaert, Michiel. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-3191-2
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33. 
Cover image for Digital Design and Implementation with Field Programmable Devices
Digital Design and Implementation with Field Programmable Devices
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Navabi, Zainalabedin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b117975
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34. 
Cover image for Computer organization and design : the hardware/software interface
Computer organization and design : the hardware/software interface
Author 
Hennessy, John L. Patterson, David A., ort. yaz.
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QA76.9.C643 H46 1994
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35. 
Cover image for Communications, Signal Processing, and Systems Proceedings of the 11th International Conference on Communications, Signal Processing, and Systems, Vol. 3
Communications, Signal Processing, and Systems Proceedings of the 11th International Conference on Communications, Signal Processing, and Systems, Vol. 3
Author 
Liang, Qilian. editor. Wang, Wei. editor. Liu, Xin. editor. Na, Zhenyu. editor. Zhang, Baoju. editor.
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https://doi.org/10.1007/978-981-99-2362-5
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36. 
Cover image for Proceedings of International Conference on Communication and Computational Technologies ICCCT 2023
Proceedings of International Conference on Communication and Computational Technologies ICCCT 2023
Author 
Kumar, Sandeep. editor. Hiranwal, Saroj. editor. Purohit, S.D. editor. Prasad, Mukesh. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-99-3485-0
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