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25. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
Author 
Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)
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ONLINE(335669.1)
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http://dx.doi.org/10.1007/978-90-481-9644-9
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26. 
Cover image for Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings
Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings
Author 
Madhusudan, P. editor. Seshia, Sanjit A. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-31424-7
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27. 
Cover image for VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
Author 
Mir, Salvador. editor. Tsui, Chi-Ying. editor. Reis, Ricardo. editor. Choy, Oliver C. S. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-32770-4
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28. 
Cover image for Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings
Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings
Author 
Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-15739-4
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29. 
Cover image for Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings
Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings
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Das, Vinu V. editor. Thankachan, Nessy. editor. Debnath, Narayan C. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-20499-9
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30. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers
Author 
Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-11802-9
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