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25. 
Cover image for SystemVerilog for Verification A Guide to Learning the Testbench Language Features
SystemVerilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. Tumbush, Greg. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0715-7
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26. 
Cover image for 3D TCAD Simulation for Semiconductor Processes, Devices and Optoelectronics
3D TCAD Simulation for Semiconductor Processes, Devices and Optoelectronics
Author 
Li, Simon. author. Fu, Yue. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0481-1
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27. 
Cover image for Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Author 
Ahuja, Sumit. author. Lakshminarayana, Avinash. author. Shukla, Sandeep Kumar. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0872-7
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28. 
Cover image for Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Author 
Stanisavljević, Miloš. author. Schmid, Alexandre. author. Leblebici, Yusuf. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6217-1
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29. 
Cover image for Multiprocessor System-on-Chip Hardware Design and Tool Integration
Multiprocessor System-on-Chip Hardware Design and Tool Integration
Author 
Hübner, Michael. editor. Becker, Jürgen. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6460-1
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30. 
Cover image for Focal-Plane Sensor-Processor Chips
Focal-Plane Sensor-Processor Chips
Author 
Zarándy, Ákos. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6475-5
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31. 
Cover image for On-Chip Interconnect with aelite Composable and Predictable Systems
On-Chip Interconnect with aelite Composable and Predictable Systems
Author 
Hansson, Andreas. author. Goossens, Kees. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6865-4
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32. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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33. 
Cover image for Analog Layout Synthesis A Survey of Topological Approaches
Analog Layout Synthesis A Survey of Topological Approaches
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Graeb, Helmut E. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6932-3
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34. 
Cover image for Design of Image Processing Embedded Systems Using Multidimensional Data Flow
Design of Image Processing Embedded Systems Using Multidimensional Data Flow
Author 
Keinert, Joachim. author. Teich, Jürgen. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7182-1
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35. 
Cover image for Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Author 
Silvano, Cristina. editor. Fornaciari, William. editor. Villar, Eugenio. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8837-9
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36. 
Cover image for Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Author 
Vasileska, Dragica. editor. Goodnick, Stephen M. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8840-9
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