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25. 
Cover image for Approximate Arithmetic Circuit Architectures for FPGA-based Systems
Approximate Arithmetic Circuit Architectures for FPGA-based Systems
Author 
Ullah, Salim. author. Kumar, Akash. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-21294-9
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26. 
Cover image for On-Chip Training NPU - Algorithm, Architecture and SoC Design
On-Chip Training NPU - Algorithm, Architecture and SoC Design
Author 
Han, Donghyeon. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-34237-0
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27. 
Cover image for Explainable machine learning models and architectures
Explainable machine learning models and architectures
Author 
Tripathi, Suman Lata, editor. Mahmud, Mufti, editor.
Preferred Shelf Number 
Q325.5 .E98 2023
Electronic Access 
https://onlinelibrary.wiley.com/doi/book/10.1002/9781394186570
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28. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
Author 
Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-50057-7
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29. 
Cover image for Foundations of Hardware IP Protection
Foundations of Hardware IP Protection
Author 
Bossuet, Lilian. editor. Torres, Lionel. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-50380-6
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30. 
Cover image for Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Author 
Sklavos, Nicolas. editor. Chaves, Ricardo. editor. Di Natale, Giorgio. editor. Regazzoni, Francesco. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-44318-8
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31. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
Author 
Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-41198-9
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32. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
Author 
Drechsler, Rolf. editor. Wille, Robert. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-31723-6
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33. 
Cover image for FPGAs for Software Programmers
FPGAs for Software Programmers
Author 
Koch, Dirk. editor. Hannig, Frank. editor. (orcid)0000-0003-3663-6484 Ziener, Daniel. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-26408-0
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34. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2013
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2013
Author 
Louërat, Marie-Minerve. editor. Maehne, Torsten. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-06317-1
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35. 
Cover image for Computer organization, design, and architecture
Computer organization, design, and architecture
Author 
Shiva, Sajjan G., author. Shiva, Sajjan G. Computer design and architecture.
Preferred Shelf Number 
TK7885 .S525 2008
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36. 
Cover image for Embedded signal processing with the Micro Signal Architecture
Embedded signal processing with the Micro Signal Architecture
Author 
Gan, Woon-Seng. Kuo, Sen M. (Sen-Maw)
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ONLINE
Electronic Access 
IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5237473
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