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1. 
Cover image for Software Defined Chips Volume II
Software Defined Chips Volume II
Author 
Liu, Leibo. author. Wei, Shaojun. author. Zhu, Jianfeng. author. Deng, Chenchen. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-19-7636-0
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Cover image for Green IT Engineering: Concepts, Models, Complex Systems Architectures
Green IT Engineering: Concepts, Models, Complex Systems Architectures
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Kharchenko, Vyacheslav. editor. Kondratenko, Yuriy. editor. Kacprzyk, Janusz. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-44162-7
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Cover image for Emerging Technology and Architecture for Big-data Analytics
Emerging Technology and Architecture for Big-data Analytics
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Chattopadhyay, Anupam. editor. (orcid)0000-0002-8818-6983 Chang, Chip Hong. editor. Yu, Hao. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54840-1
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Cover image for Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
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Chen, Quan. author. Guo, Minyi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-6238-4
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5. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
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Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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6. 
Cover image for Embedded Software Verification and Debugging
Embedded Software Verification and Debugging
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Lettnin, Djones. editor. Winterholer, Markus. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-2266-2
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7. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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8. 
Cover image for High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
Author 
Kunkel, Julian M. editor. Yokota, Rio. editor. Balaji, Pavan. editor. Keyes, David. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-58667-0
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9. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
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Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50057-7
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10. 
Cover image for Computing Platforms for Software-Defined Radio
Computing Platforms for Software-Defined Radio
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Hussain, Waqar. editor. Nurmi, Jari. editor. Isoaho, Jouni. editor. Garzia, Fabio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49679-5
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11. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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12. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
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Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-41198-9
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