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1. 
Cover image for Separation Logic for High-level Synthesis
Separation Logic for High-level Synthesis
Author 
Winterstein, Felix. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53222-6
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2. 
Cover image for High-Speed Decoders for Polar Codes
High-Speed Decoders for Polar Codes
Author 
Giard, Pascal. author. Thibeault, Claude. author. Gross, Warren J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-59782-9
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3. 
Cover image for High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
Author 
Palchaudhuri, Ayan. author. Chakraborty, Rajat Subhra. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-81-322-2520-1
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4. 
Cover image for Logic Synthesis for FPGA-Based Finite State Machines
Logic Synthesis for FPGA-Based Finite State Machines
Author 
Barkalov, Alexander. author. Titarenko, Larysa. author. Kolopienczyk, Malgorzata. author. Mielcarek, Kamil. author. Bazydlo, Grzegorz. author.
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https://doi.org/10.1007/978-3-319-24202-6
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5. 
Cover image for Fuzzy Logic Type 1 and Type 2 Based on LabVIEW™ FPGA
Fuzzy Logic Type 1 and Type 2 Based on LabVIEW™ FPGA
Author 
Ponce-Cruz, Pedro. author. Molina, Arturo. author. MacCleery, Brian. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-26656-5
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6. 
Cover image for Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
Author 
Sano, Kentaro. editor. Soudris, Dimitrios. editor. Hübner, Michael. editor. Diniz, Pedro C. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-16214-0
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7. 
Cover image for Three-Dimensional Design Methodologies for Tree-based FPGA Architecture
Three-Dimensional Design Methodologies for Tree-based FPGA Architecture
Author 
Pangracious, Vinod. author. Marrakchi, Zied. author. Mehrez, Habib. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-19174-4
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8. 
Cover image for Embedded SoPC design with NIOS II processor and Verilog examples
Embedded SoPC design with NIOS II processor and Verilog examples
Author 
Chu, Pong P., 1959-
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ONLINE
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Wiley InterScience An electronic book accessible through the World Wide Web; click for information
Available by subscription from Safari Books Online
Ebook Library http://public.eblib.com/EBLPublic/PublicView.do?ptiID=822053
ebrary http://site.ebrary.com/id/10630577
Volltext http://proquest.tech.safaribooksonline.de/9781118011034
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9. 
Cover image for Embedded SOPC design with NIOS II processor and VHDL examples
Embedded SOPC design with NIOS II processor and VHDL examples
Author 
Chu, Pong P., 1959- Wiley InterScience (Online service)
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ONLINE
Electronic Access 
Wiley InterScience An electronic book accessible through the World Wide Web; click for information
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ebrary http://site.ebrary.com/id/10560671
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10. 
Cover image for Embedded core design with FPGAs
Embedded core design with FPGAs
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Navabi, Zainalabedin.
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11. 
Cover image for VLIW microprocessor hardware design for ASIC and FPGA
VLIW microprocessor hardware design for ASIC and FPGA
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Lee, Weng Fook.
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12. 
Cover image for 100 power tips for FPGA designers
100 power tips for FPGA designers
Author 
Stavinov, Evgeni.
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TK7895.G36 S73 2011
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