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37. 
Cover image for On-Chip Instrumentation Design and Debug for Systems on Chip
On-Chip Instrumentation Design and Debug for Systems on Chip
Author 
Stollon, Neal. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-7563-8
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38. 
Cover image for Energy Harvesting Systems Principles, Modeling and Applications
Energy Harvesting Systems Principles, Modeling and Applications
Author 
Kaźmierski, Tom J. editor. Beeby, Steve. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7566-9
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39. 
Cover image for Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Author 
Battezzati, Niccolò. author. Sterpone, Luca. author. Violante, Massimo. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-7595-9
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40. 
Cover image for Nanoscale Memory Repair
Nanoscale Memory Repair
Author 
Horiguchi, Masashi. author. Itoh, Kiyoo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7958-2
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41. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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42. 
Cover image for Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Author 
Okada, Kenichi. editor. Kousai, Shouhei. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-8514-9
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43. 
Cover image for The Simple Art of SoC Design Closing the Gap between RTL and ESL
The Simple Art of SoC Design Closing the Gap between RTL and ESL
Author 
Keating, Michael. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8586-6
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44. 
Cover image for Principles of VLSI RTL Design A Practical Guide
Principles of VLSI RTL Design A Practical Guide
Author 
Churiwala, Sanjay. author. Garg, Sapan. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9296-3
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45. 
Cover image for High-Level Verification Methods and Tools for Verification of System-Level Designs
High-Level Verification Methods and Tools for Verification of System-Level Designs
Author 
Kundu, Sudipta. author. Lerner, Sorin. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-9359-5
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46. 
Cover image for Programming Many-Core Chips
Programming Many-Core Chips
Author 
Vajda, András. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-9739-5
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47. 
Cover image for Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Author 
Cardoso, João M. P. editor. Hübner, Michael. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0061-5
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48. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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