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37. 
Cover image for The IoT Physical Layer Design and Implementation
The IoT Physical Layer Design and Implementation
Author 
Elfadel, Ibrahim (Abe) M. editor. Ismail, Mohammed. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-93100-5
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38. 
Cover image for Cognitive Radio, Mobile Communications and Wireless Networks
Cognitive Radio, Mobile Communications and Wireless Networks
Author 
Rehmani, Mubashir Husain. editor. Dhaou, Riadh. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-91002-4
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39. 
Cover image for Post-Silicon Validation and Debug
Post-Silicon Validation and Debug
Author 
Mishra, Prabhat. editor. Farahmandi, Farimah. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-98116-1
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40. 
Cover image for Exact Design of Digital Microfluidic Biochips
Exact Design of Digital Microfluidic Biochips
Author 
Keszocze, Oliver. author. Wille, Robert. author. Drechsler, Rolf. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-90936-3
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41. 
Cover image for Electronically Scanned Arrays (ESAs) and K-Space Gain Formulation
Electronically Scanned Arrays (ESAs) and K-Space Gain Formulation
Author 
Dana, Roger A. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-04678-1
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42. 
Cover image for CMOS-Compatible Key Engineering Devices for High-Speed Silicon-Based Optical Interconnections
CMOS-Compatible Key Engineering Devices for High-Speed Silicon-Based Optical Interconnections
Author 
Wang, Jing. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-3378-1
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43. 
Cover image for Energy Limits in Computation A Review of Landauer’s Principle, Theory and Experiments
Energy Limits in Computation A Review of Landauer’s Principle, Theory and Experiments
Author 
Lent, Craig S. editor. Orlov, Alexei O. editor. Porod, Wolfgang. editor. Snider, Gregory L. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-93458-7
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44. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Author 
Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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45. 
Cover image for Micro-Electrode-Dot-Array Digital Microfluidic Biochips Design Automation, Optimization, and Test Techniques
Micro-Electrode-Dot-Array Digital Microfluidic Biochips Design Automation, Optimization, and Test Techniques
Author 
Li, Zipeng. author. Chakrabarty, Krishnendu. author. Ho, Tsung-Yi. author. Lee, Chen-Yi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02964-7
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46. 
Cover image for Learning from VLSI Design Experience
Learning from VLSI Design Experience
Author 
Lee, Weng Fook. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-03238-8
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47. 
Cover image for Variant Construction from Theoretical Foundation to Applications
Variant Construction from Theoretical Foundation to Applications
Author 
Zheng, Jeffrey. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-2282-2
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48. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-13605-5
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