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1. 
Cover image for On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits
On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits
Author 
Cui, Qiang. author. Liou, Juin J. author. Hajjar, Jean-Jacques. author. Salcedo, Javier. author. Zhou, Yuanzhong. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-10819-3
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2. 
Cover image for Microarchitecture of Network-on-Chip Routers A Designer's Perspective
Microarchitecture of Network-on-Chip Routers A Designer's Perspective
Author 
Dimitrakopoulos, Giorgos. author. Psarras, Anastasios. author. Seitanidis, Ioannis. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-4301-8
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3. 
Cover image for Analysis and Design of Networks-on-Chip Under High Process Variation
Analysis and Design of Networks-on-Chip Under High Process Variation
Author 
Ezz-Eldin, Rabab. author. El-Moursy, Magdy Ali. author. Hamed, Hesham F. A. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-25766-2
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4. 
Cover image for Lab-on-a-Chip Devices and Micro-Total Analysis Systems A Practical Guide
Lab-on-a-Chip Devices and Micro-Total Analysis Systems A Practical Guide
Author 
Castillo-León, Jaime. editor. Svendsen, Winnie E. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-08687-3
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5. 
Cover image for Network-on-chip : the next generation of system-on-chip integration
Network-on-chip : the next generation of system-on-chip integration
Author 
Kundu, Santanu, author. Chattopadhyay, Santanu, contributor.
Preferred Shelf Number 
TK5105.546 .K86 2015
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6. 
Cover image for Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Author 
Mandal, Ayan. author. Khatri, Sunil P. author. Mahapatra, Rabi. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-1-4614-9405-8
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7. 
Cover image for Debugging Systems-on-Chip Communication-centric and Abstraction-based Techniques
Debugging Systems-on-Chip Communication-centric and Abstraction-based Techniques
Author 
Vermeulen, Bart. author. Goossens, Kees. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-06242-6
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8. 
Cover image for Models, Methods, and Tools for Complex Chip Design Selected Contributions from FDL 2012
Models, Methods, and Tools for Complex Chip Design Selected Contributions from FDL 2012
Author 
Haase, Jan. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01418-0
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9. 
Cover image for Biological identification : DNA amplification and sequencing, optical sensing, lab-on-chip and portable systems
Biological identification : DNA amplification and sequencing, optical sensing, lab-on-chip and portable systems
Author 
Schaudies, R. Paul, editor of compilation.
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ONLINE(355794.1)
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780857095015
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10. 
Cover image for Designing 2D and 3D Network-on-Chip Architectures
Designing 2D and 3D Network-on-Chip Architectures
Author 
Tatas, Konstantinos. author. Siozios, Kostas. author. Soudris, Dimitrios. author. Jantsch, Axel. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-1-4614-4274-5
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11. 
Cover image for Embedded Memory Design for Multi-Core and Systems on Chip
Embedded Memory Design for Multi-Core and Systems on Chip
Author 
Mohammad, Baker. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-1-4614-8881-1
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12. 
Cover image for Hoop crazy the lives of Clair Bee and Chip Hilton
Hoop crazy the lives of Clair Bee and Chip Hilton
Author 
Gildea, Dennis. Project Muse.
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ONLINE(321606.1)
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