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37. 
Cover image for FPGA Based Accelerators for Financial Applications
FPGA Based Accelerators for Financial Applications
Author 
De Schryver, Christian. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-15407-7
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38. 
Cover image for Multi-Net Optimization of VLSI Interconnect
Multi-Net Optimization of VLSI Interconnect
Author 
Moiseev, Konstantin. author. Kolodny, Avinoam. author. Wimer, Shmuel. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-0821-5
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39. 
Cover image for Arbitrary Modeling of TSVs for 3D Integrated Circuits
Arbitrary Modeling of TSVs for 3D Integrated Circuits
Author 
Salah, Khaled. author. Ismail, Yehea. author. El-Rouby, Alaa. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07611-9
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40. 
Cover image for SVA: The Power of Assertions in SystemVerilog
SVA: The Power of Assertions in SystemVerilog
Author 
Cerny, Eduard. author. Dudani, Surrendra. author. Havlicek, John. author. Korchemny, Dmitry. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07139-8
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