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37. 
Cover image for Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Author 
Cardoso, João M. P. editor. Hübner, Michael. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0061-5
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38. 
Cover image for Multiprocessor System-on-Chip Hardware Design and Tool Integration
Multiprocessor System-on-Chip Hardware Design and Tool Integration
Author 
Hübner, Michael. editor. Becker, Jürgen. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-6460-1
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39. 
Cover image for Focal-Plane Sensor-Processor Chips
Focal-Plane Sensor-Processor Chips
Author 
Zarándy, Ákos. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6475-5
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40. 
Cover image for On-Chip Interconnect with aelite Composable and Predictable Systems
On-Chip Interconnect with aelite Composable and Predictable Systems
Author 
Hansson, Andreas. author. Goossens, Kees. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6865-4
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41. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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42. 
Cover image for Analog Layout Synthesis A Survey of Topological Approaches
Analog Layout Synthesis A Survey of Topological Approaches
Author 
Graeb, Helmut E. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6932-3
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43. 
Cover image for Nanoscale Memory Repair
Nanoscale Memory Repair
Author 
Horiguchi, Masashi. author. Itoh, Kiyoo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7958-2
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44. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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45. 
Cover image for Memory-Based Logic Synthesis
Memory-Based Logic Synthesis
Author 
Sasao, Tsutomu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8104-2
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46. 
Cover image for CMOS Circuits for Passive Wireless Microsystems
CMOS Circuits for Passive Wireless Microsystems
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7680-2
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47. 
Cover image for Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Author 
Okada, Kenichi. editor. Kousai, Shouhei. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8514-9
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48. 
Cover image for The Simple Art of SoC Design Closing the Gap between RTL and ESL
The Simple Art of SoC Design Closing the Gap between RTL and ESL
Author 
Keating, Michael. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8586-6
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