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37. 
Cover image for Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog
Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog
Author 
Ramachandran, S. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5829-5
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38. 
Cover image for Übungsaufgaben zur Halbleiter-Schaltungstechnik
Übungsaufgaben zur Halbleiter-Schaltungstechnik
Author 
Göbel, Holger. author. Siemund, Henning. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-3-540-37092-5
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39. 
Cover image for Systemverilog for Verification A Guide to Learning the Testbench Language Features
Systemverilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b138536
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40. 
Cover image for Interconnect Noise Optimization in Nanometer Technologies
Interconnect Noise Optimization in Nanometer Technologies
Author 
Elgamel, Mohamed A. author. Bayoumi, Magdy A. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-29366-3
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41. 
Cover image for Leakage in Nanometer CMOS Technologies
Leakage in Nanometer CMOS Technologies
Author 
Narendra, Siva G. author. Chandrakasan, Anantha. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-28133-9
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42. 
Cover image for Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications
Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications
Author 
Sakurai, Takayasu. author. Matsuzawa, Akira. author. Douseki, Takakuni. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-29218-2
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43. 
Cover image for Scalable Hardware Verification with Symbolic Simulation
Scalable Hardware Verification with Symbolic Simulation
Author 
Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-29906-8
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44. 
Cover image for Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
Author 
Goloubeva, Olga. author. Rebaudengo, Maurizio. author. Reorda, Matteo Sonza. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32937-4
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45. 
Cover image for SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling
SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling
Author 
Sutherland, Stuart. author. Davidmann, Simon. author. Flake, Peter. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-36495-1
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46. 
Cover image for Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Author 
Vachoux, A. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4998-9
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47. 
Cover image for Platform Based Design at the Electronic System Level Industry Perspectives and Experiences
Platform Based Design at the Electronic System Level Industry Perspectives and Experiences
Author 
Burton, Mark. author. Morawiec, Adam. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-5138-7
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48. 
Cover image for Integrated Circuit Test Engineering Modern Techniques
Integrated Circuit Test Engineering Modern Techniques
Author 
Grout, Ian A. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-84628-173-3
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