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49. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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50. 
Cover image for Handbook of Hardware/Software Codesign
Handbook of Hardware/Software Codesign
Author 
Ha, Soonhoi. editor. Teich, Jürgen. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-94-017-7267-9
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51. 
Cover image for Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
Author 
Hu, Kai. author. Chakrabarty, Krishnendu. author. Ho, Tsung-Yi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-56255-1
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52. 
Cover image for Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Author 
Chen, Quan. author. Guo, Minyi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-6238-4
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53. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
Author 
Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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54. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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55. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
Author 
Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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56. 
Cover image for Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Author 
Ahmed, Jameel. author. Siyal, Mohammed Yakoob. author. Najam, Shaheryar. author. Najam, Zohaib. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-3120-5
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57. 
Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
Embedded Systems Design with Special Arithmetic and Number Systems
Author 
Molahosseini, Amir Sabbagh. editor. de Sousa, Leonel Seabra. editor. (orcid)0000-0002-8066-221X Chang, Chip-Hong. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49742-6
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58. 
Cover image for Operational Amplifiers Theory and Design
Operational Amplifiers Theory and Design
Author 
Huijsing, Johan. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-28127-8
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59. 
Cover image for More-than-Moore 2.5D and 3D SiP Integration
More-than-Moore 2.5D and 3D SiP Integration
Author 
Radojcic, Riko. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-52548-8
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60. 
Cover image for High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
Author 
Kunkel, Julian M. editor. Yokota, Rio. editor. Balaji, Pavan. editor. Keyes, David. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-58667-0
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