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49. 
Cover image for Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Author 
Posser, Gracieli. author. Sapatnekar, Sachin S. author. Reis, Ricardo. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-48899-8
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50. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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51. 
Cover image for Operational Amplifiers Theory and Design
Operational Amplifiers Theory and Design
Author 
Huijsing, Johan. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-28127-8
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52. 
Cover image for Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Author 
Ahmed, Jameel. author. Siyal, Mohammed Yakoob. author. Najam, Shaheryar. author. Najam, Zohaib. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-3120-5
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53. 
Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
Embedded Systems Design with Special Arithmetic and Number Systems
Author 
Molahosseini, Amir Sabbagh. editor. de Sousa, Leonel Seabra. editor. (orcid)0000-0002-8066-221X Chang, Chip-Hong. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49742-6
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54. 
Cover image for Carbon Nanotubes for Interconnects Process, Design and Applications
Carbon Nanotubes for Interconnects Process, Design and Applications
Author 
Todri-Sanial, Aida. editor. Dijon, Jean. editor. Maffucci, Antonio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-29746-0
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55. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
Author 
Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49025-0
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56. 
Cover image for Automatic Methods for the Refinement of System Models From the Specification to the Implementation
Automatic Methods for the Refinement of System Models From the Specification to the Implementation
Author 
Seiter, Julia. author. Wille, Robert. author. Drechsler, Rolf. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-41480-5
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57. 
Cover image for Advanced Parallel Processing Technologies 12th International Symposium, APPT 2017, Santiago de Compostela, Spain, August 29, 2017, Proceedings
Advanced Parallel Processing Technologies 12th International Symposium, APPT 2017, Santiago de Compostela, Spain, August 29, 2017, Proceedings
Author 
Dou, Yong. editor. Lin, Haixiang. editor. Sun, Guangyu. editor. Wu, Junjie. editor. (orcid)0000-0001-5951-8988 Heras, Dora. editor.
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https://doi.org/10.1007/978-3-319-67952-5
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58. 
Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Author 
Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42037-0
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59. 
Cover image for Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
Author 
Zhan, Naijun. author. Wang, Shuling. author. (orcid)0000-0002-2798-2660 Zhao, Hengjun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47016-0
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60. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
Author 
Churiwala, Sanjay. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42438-5
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