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49. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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50. 
Cover image for Analog Layout Synthesis A Survey of Topological Approaches
Analog Layout Synthesis A Survey of Topological Approaches
Author 
Graeb, Helmut E. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6932-3
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51. 
Cover image for Wearable Monitoring Systems
Wearable Monitoring Systems
Author 
Bonfiglio, Annalisa. editor. De Rossi, Danilo. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7384-9
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52. 
Cover image for Run-time Adaptation for Reconfigurable Embedded Processors
Run-time Adaptation for Reconfigurable Embedded Processors
Author 
Bauer, Lars. author. Henkel, Jörg. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7412-9
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53. 
Cover image for Low-Power Variation-Tolerant Design in Nanometer Silicon
Low-Power Variation-Tolerant Design in Nanometer Silicon
Author 
Bhunia, Swarup. editor. Mukhopadhyay, Saibal. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7418-1
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54. 
Cover image for Introduction to Mixed-Signal, Embedded Design
Introduction to Mixed-Signal, Embedded Design
Author 
Doboli, Alex. author. Currie, Edward H. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7446-4
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55. 
Cover image for Voltage Regulators for Next Generation Microprocessors
Voltage Regulators for Next Generation Microprocessors
Author 
López, Toni. author. Elferich, Reinhold. author. Alarcón, Eduard. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7560-7
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56. 
Cover image for Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Author 
Battezzati, Niccolò. author. Sterpone, Luca. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7595-9
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57. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8034-2
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58. 
Cover image for Memory-Based Logic Synthesis
Memory-Based Logic Synthesis
Author 
Sasao, Tsutomu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8104-2
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59. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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60. 
Cover image for Embedded Software Design and Programming of Multiprocessor System-on-Chip Simulink and System C Case Studies
Embedded Software Design and Programming of Multiprocessor System-on-Chip Simulink and System C Case Studies
Author 
Popovici, Katalin. author. Rousseau, Frédéric. author. Jerraya, Ahmed A. author. Wolf, Marilyn. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-5567-8
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