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1. 
Cover image for Interoperable Electronic Safety Equipment Performance Requirements for Compatible and Interoperable Electronic Equipment for Emergency First Responders
Interoperable Electronic Safety Equipment Performance Requirements for Compatible and Interoperable Electronic Equipment for Emergency First Responders
Author 
Grant, Casey C. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-8277-2
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2. 
Cover image for Modeling for reliability analysis Markov modeling for reliability, maintainability, safety, and supportability analyses of complex computer systems
Modeling for reliability analysis Markov modeling for reliability, maintainability, safety, and supportability analyses of complex computer systems
Author 
Pukite, Jan, 1928- Pukite, Paul.
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IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5263338
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3. 
Cover image for FMEA - Einführung und Moderation Durch systematische Entwicklung zur übersichtlichen Risikominimierung (inkl. Methoden im Umfeld)
FMEA - Einführung und Moderation Durch systematische Entwicklung zur übersichtlichen Risikominimierung (inkl. Methoden im Umfeld)
Author 
Werdich, Martin. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-8348-2217-8
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4. 
Cover image for Machine Vision Handbook
Machine Vision Handbook
Author 
Batchelor, Bruce G. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-84996-169-1
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5. 
Cover image for Fault Location on Power Networks
Fault Location on Power Networks
Author 
Saha, Murari Mohan. author. Izykowski, Jan. author. Rosolowski, Eugeniusz. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-84882-886-5
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6. 
Cover image for Emerging Nanotechnologies Test, Defect Tolerance, and Reliability
Emerging Nanotechnologies Test, Defect Tolerance, and Reliability
Author 
Tehranipoor, Mohammad. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-74747-7
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7. 
Cover image for Writing Testbenches using System Verilog
Writing Testbenches using System Verilog
Author 
Bergeron, Janick. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-31275-7
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