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1. 
Cover image for Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Author 
Maichen, Wolfgang. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-31419-8
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2. 
Cover image for Adaptive Techniques for Mixed Signal System on Chip
Adaptive Techniques for Mixed Signal System on Chip
Author 
Fayed, Ayman. author. Ismail, Mohammed. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-32155-4
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3. 
Cover image for Computation Engineering Applied Automata Theory and Logic
Computation Engineering Applied Automata Theory and Logic
Author 
Gopalakrishnan, Ganesh. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32520-4
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4. 
Cover image for Effective Functional Verification Principles and Processes
Effective Functional Verification Principles and Processes
Author 
Vasudevan, Srivatsa. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32620-0
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5. 
Cover image for Digital Phase Lock Loops Architectures and Applications
Digital Phase Lock Loops Architectures and Applications
Author 
Al-araji, Saleh R. author. Hussain, Zahir M. author. Al-qutayri, Mahmoud A. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-32864-5
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6. 
Cover image for Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
Author 
Goloubeva, Olga. author. Rebaudengo, Maurizio. author. Reorda, Matteo Sonza. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32937-4
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7. 
Cover image for VLSI-SOC: From Systems to Chips IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1–3, 2003, Darmstadt, Germany
VLSI-SOC: From Systems to Chips IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1–3, 2003, Darmstadt, Germany
Author 
Glesner, Manfred. editor. Reis, Ricardo. editor. Indrusiak, Leandro. editor. Mooney, Vincent. editor. Eveking, Hans. editor.
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http://dx.doi.org/10.1007/0-387-33403-3
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8. 
Cover image for A Roadmap for Formal Property Verification
A Roadmap for Formal Property Verification
Author 
DasGupta, Pallab. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4758-9
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9. 
Cover image for Continuous-Time Signals
Continuous-Time Signals
Author 
Shmaliy, Yuriy. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4818-0
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10. 
Cover image for Fast, Efficient and Predictable Memory Accesses Optimization Algorithms for Memory Architecture Aware Compilation
Fast, Efficient and Predictable Memory Accesses Optimization Algorithms for Memory Architecture Aware Compilation
Author 
Wehmeyer, Lars. author. Marwedel, Peter. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4822-X
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11. 
Cover image for Radio Design in Nanometer Technologies
Radio Design in Nanometer Technologies
Author 
ISMAIL, MOHAMMED. editor. GONZÁLEZ, DELIA RODRÍGUEZ DE LLERA. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4824-1
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12. 
Cover image for Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Author 
Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4826-2
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