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1. 
Cover image for Logic Functions and Equations Binary Models for Computer Science
Logic Functions and Equations Binary Models for Computer Science
Author 
Posthoff, Christian. author. Steinbach, Bernd. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02420-8
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2. 
Cover image for Analog Circuit Theory and Filter Design in the Digital World With an Introduction to the Morphological Method for Creative Solutions and Design
Analog Circuit Theory and Filter Design in the Digital World With an Introduction to the Morphological Method for Creative Solutions and Design
Author 
Moschytz, George S. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-00096-7
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3. 
Cover image for Beyond-CMOS Technologies for Next Generation Computer Design
Beyond-CMOS Technologies for Next Generation Computer Design
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Topaloglu, Rasit O. editor. Wong, H.-S. Philip. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-90385-9
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4. 
Cover image for Introduction to Digital Systems Design
Introduction to Digital Systems Design
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Donzellini, Giuliano. author. Oneto, Luca. author. Ponta, Domenico. author. Anguita, Davide. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-92804-3
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5. 
Cover image for Tools and Algorithms for the Construction and Analysis of Systems 25th International Conference, TACAS 2019, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2019, Prague, Czech Republic, April 6–11, 2019, Proceedings, Part II
Tools and Algorithms for the Construction and Analysis of Systems 25th International Conference, TACAS 2019, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2019, Prague, Czech Republic, April 6–11, 2019, Proceedings, Part II
Author 
Vojnar, Tomáš. editor. (orcid)0000-0002-2746-8792 Zhang, Lijun. editor. (orcid)0000-0002-3692-2088 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-17465-1
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6. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Author 
Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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7. 
Cover image for Variant Construction from Theoretical Foundation to Applications
Variant Construction from Theoretical Foundation to Applications
Author 
Zheng, Jeffrey. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-2282-2
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8. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-13605-5
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9. 
Cover image for Quick Start Guide to Verilog
Quick Start Guide to Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-10552-5
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10. 
Cover image for Architecture of Computing Systems – ARCS 2019 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings
Architecture of Computing Systems – ARCS 2019 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings
Author 
Schoeberl, Martin. editor. Hochberger, Christian. editor. Uhrig, Sascha. editor. Brehm, Jürgen. editor. Pionteck, Thilo. editor. (orcid)0000-0001-6518-1226
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https://doi.org/10.1007/978-3-030-18656-2
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11. 
Cover image for Reversible Computation 11th International Conference, RC 2019, Lausanne, Switzerland, June 24–25, 2019, Proceedings
Reversible Computation 11th International Conference, RC 2019, Lausanne, Switzerland, June 24–25, 2019, Proceedings
Author 
Thomsen, Michael Kirkedal. editor. (orcid)0000-0003-0922-3609 Soeken, Mathias. editor. (orcid)0000-0002-0229-8766 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-21500-2
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12. 
Cover image for Euro-Par 2018: Parallel Processing Workshops Euro-Par 2018 International Workshops, Turin, Italy, August 27-28, 2018, Revised Selected Papers
Euro-Par 2018: Parallel Processing Workshops Euro-Par 2018 International Workshops, Turin, Italy, August 27-28, 2018, Revised Selected Papers
Author 
Mencagli, Gabriele. editor. B. Heras, Dora. editor. Cardellini, Valeria. editor. Casalicchio, Emiliano. editor. Jeannot, Emmanuel. editor.
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https://doi.org/10.1007/978-3-030-10549-5
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