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217. 
Cover image for FSM-based digital design using Verilog HDL
FSM-based digital design using Verilog HDL
Author 
Minns, Peter D. Elliott, Ian D.
Preferred Shelf Number 
ONLINE
Electronic Access 
Available by subscription from Safari Books Online
John Wiley http://dx.doi.org/10.1002/9780470987629
Volltext http://proquest.tech.safaribooksonline.de/9780470060704
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218. 
Cover image for VHDL : a design oriented approach
VHDL : a design oriented approach
Author 
Limaye, S. S.
Preferred Shelf Number 
TK7885.7 L56 2008
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219. 
Cover image for Computer organization, design, and architecture
Computer organization, design, and architecture
Author 
Shiva, Sajjan G., author. Shiva, Sajjan G. Computer design and architecture.
Preferred Shelf Number 
TK7885 .S525 2008
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220. 
Cover image for FPGA prototyping by Verilog examples Xilinx Spartan -3 version
FPGA prototyping by Verilog examples Xilinx Spartan -3 version
Author 
Chu, Pong P., 1959-
Preferred Shelf Number 
ONLINE
Electronic Access 
John Wiley http://dx.doi.org/10.1002/9780470374283
Contributor biographical information http://catdir.loc.gov/catdir/enhancements/fy0835/2008003732-b.html
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221. 
Cover image for Cryptographic Algorithms on Reconfigurable Hardware
Cryptographic Algorithms on Reconfigurable Hardware
Author 
Rodríguez-Henríquez, Francisco. author. Pérez, Arturo Díaz. author. Saqib, Nazar Abbas. author. Koç, Çetin Kaya. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
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http://dx.doi.org/10.1007/978-0-387-36682-1
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222. 
Cover image for CMOS Current-Mode Circuits for Data Communications
CMOS Current-Mode Circuits for Data Communications
Author 
Yuan, Fei. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-47691-9
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223. 
Cover image for CMOS Biotechnology
CMOS Biotechnology
Author 
Lee, Hakho. editor. Westervelt, Robert M. editor. Ham, Donhee. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-68913-5
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224. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-68953-1
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225. 
Cover image for Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Author 
Sutherland, Stuart. author. Mills, Don. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-71715-9
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226. 
Cover image for Hardware Verification with SystemVerilog An Object-Oriented Framework
Hardware Verification with SystemVerilog An Object-Oriented Framework
Author 
Mintz, Mike. author. Ekendahl, Robert. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-71740-1
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227. 
Cover image for Low Power Methodology Manual For System-on-Chip Design
Low Power Methodology Manual For System-on-Chip Design
Author 
Keating, Michael. author. Flynn, David. author. Aitken, Robert. author. Gibbons, Alan. author. Shi, Kaijian. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-71819-4
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228. 
Cover image for Co-design for System Acceleration A Quantitative Approach
Co-design for System Acceleration A Quantitative Approach
Author 
Nedjah, Nadia. author. Mourelle, Luiza De Macedo. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
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http://dx.doi.org/10.1007/978-1-4020-5546-1
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