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1. 
Cover image for Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Runtime Verification for Modern Processors
Author 
Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-8034-2
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2. 
Cover image for Memory-Based Logic Synthesis
Memory-Based Logic Synthesis
Author 
Sasao, Tsutomu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8104-2
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3. 
Cover image for Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio
Author 
Okada, Kenichi. editor. Kousai, Shouhei. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8514-9
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4. 
Cover image for The Simple Art of SoC Design Closing the Gap between RTL and ESL
The Simple Art of SoC Design Closing the Gap between RTL and ESL
Author 
Keating, Michael. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8586-6
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5. 
Cover image for Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Author 
Silvano, Cristina. editor. Fornaciari, William. editor. Villar, Eugenio. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8837-9
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6. 
Cover image for Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Author 
Vasileska, Dragica. editor. Goodnick, Stephen M. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8840-9
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7. 
Cover image for Principles of VLSI RTL Design A Practical Guide
Principles of VLSI RTL Design A Practical Guide
Author 
Churiwala, Sanjay. author. Garg, Sapan. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9296-3
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8. 
Cover image for High-Level Verification Methods and Tools for Verification of System-Level Designs
High-Level Verification Methods and Tools for Verification of System-Level Designs
Author 
Kundu, Sudipta. author. Lerner, Sorin. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9359-5
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9. 
Cover image for Formal Development of a Network-Centric RTOS Software Engineering for Reliable Embedded Systems
Formal Development of a Network-Centric RTOS Software Engineering for Reliable Embedded Systems
Author 
Verhulst, Eric. author. Boute, Raymond T. author. Faria, José Miguel Sampaio. author. Sputh, Bernhard H.C. author. Mezhuyev, Vitaliy. author.
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http://dx.doi.org/10.1007/978-1-4419-9736-4
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10. 
Cover image for Programming Many-Core Chips
Programming Many-Core Chips
Author 
Vajda, András. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9739-5
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11. 
Cover image for Information Modeling for Interoperable Dimensional Metrology
Information Modeling for Interoperable Dimensional Metrology
Author 
Zhao, Yaoyao (Fiona). author. Brown, Robert. author. Kramer, Thomas R. author. Xu, Xun. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4471-2167-1
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12. 
Cover image for Euclidean Shortest Paths Exact or Approximate Algorithms
Euclidean Shortest Paths Exact or Approximate Algorithms
Author 
Li, Fajie. author. Klette, Reinhard. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4471-2256-2
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