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1. 
Cover image for Processor and System-on-Chip Simulation
Processor and System-on-Chip Simulation
Author 
Leupers, Rainer. editor. Temam, Olivier. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-6175-4
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2. 
Cover image for Power Estimation on Electronic System Level using Linear Power Models
Power Estimation on Electronic System Level using Linear Power Models
Author 
Schuermans, Stefan. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-030-01875-7
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3. 
Cover image for Programming Heterogeneous MPSoCs Tool Flows to Close the Software Productivity Gap
Programming Heterogeneous MPSoCs Tool Flows to Close the Software Productivity Gap
Author 
Castrillón Mazo, Jerónimo. author. Leupers, Rainer. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-00675-8
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4. 
Cover image for Application Analysis Tools for ASIP Design Application Profiling and Instruction-set Customization
Application Analysis Tools for ASIP Design Application Profiling and Instruction-set Customization
Author 
Karuri, Kingshuk. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-8255-1
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5. 
Cover image for C Compilers for ASIPs Automatic Compiler Generation with LISA
C Compilers for ASIPs Automatic Compiler Generation with LISA
Author 
Hohenauer, Manuel. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-1176-6
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6. 
Cover image for Handbook of Signal Processing Systems
Handbook of Signal Processing Systems
Author 
Bhattacharyya, Shuvra S. editor. Deprettere, Ed F. editor. Leupers, Rainer. editor. Takala, Jarmo. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-91734-4
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7. 
Cover image for Handbook of Signal Processing Systems
Handbook of Signal Processing Systems
Author 
Bhattacharyya, Shuvra S. editor. Deprettere, Ed F. editor. Leupers, Rainer. editor. Takala, Jarmo. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(332139.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-6859-2
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8. 
Cover image for Multiprocessor Systems on Chip Design Space Exploration
Multiprocessor Systems on Chip Design Space Exploration
Author 
Kempf, Torsten. author. Ascheid, Gerd. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-8153-0
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9. 
Cover image for Handbook of Signal Processing Systems
Handbook of Signal Processing Systems
Author 
Bhattacharyya, Shuvra S. editor. Deprettere, Ed F. editor. Leupers, Rainer. editor. Takala, Jarmo. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-6345-1
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10. 
Cover image for Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
Author 
Chattopadhyay, Anupam. author. Leupers, Rainer. author. Meyr, Heinrich. author. Ascheid, Gerd. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-9297-8
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11. 
Cover image for Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Author 
Wieferink, Andreas. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-8652-6
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12. 
Cover image for Optimized ASIP Synthesis from Architecture Description Language Models
Optimized ASIP Synthesis from Architecture Description Language Models
Author 
Schliebusch, Oliver. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5686-4
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13. 
Cover image for Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Author 
Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-4826-2
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