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1. 
Cover image for Integrated Electronic Circuits
Integrated Electronic Circuits
Author 
Atallah, Jad G. author. Ismail, Mohammed. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-62707-1
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2. 
Cover image for Counterfeit Integrated Circuits Detection and Avoidance
Counterfeit Integrated Circuits Detection and Avoidance
Author 
Tehranipoor, Mark (Mohammad). author. Guin, Ujjwal. author. Forte, Domenic. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-11824-6
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3. 
Cover image for Fundamentals of Electromigration-Aware Integrated Circuit Design
Fundamentals of Electromigration-Aware Integrated Circuit Design
Author 
Lienig, Jens. author. (orcid)0000-0002-2140-4587 Rothe, Susann. author. Thiele, Matthias. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-80023-8
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4. 
Cover image for Integrated Circuit Design Tape-out Process with Open-Source Tools
Integrated Circuit Design Tape-out Process with Open-Source Tools
Author 
Ortega Cisneros, Susana. author. Baungarten Leon, Emilio Isaac. author. (orcid)0000-0001-6243-219X Mejia Alvarez, Pedro. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-92108-7
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5. 
Cover image for Parallel Sparse Direct Solver for Integrated Circuit Simulation
Parallel Sparse Direct Solver for Integrated Circuit Simulation
Author 
Chen, Xiaoming. author. Wang, Yu. author. Yang, Huazhong. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53429-9
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6. 
Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
Testing of Interposer-Based 2.5D Integrated Circuits
Author 
Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54714-5
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7. 
Cover image for Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Author 
Sklavos, Nicolas. editor. Chaves, Ricardo. editor. Di Natale, Giorgio. editor. Regazzoni, Francesco. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-44318-8
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8. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
Author 
Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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9. 
Cover image for Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques
Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques
Author 
Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Lourenço, Nuno. author. Horta, Nuno. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-34060-9
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10. 
Cover image for Arbitrary Modeling of TSVs for 3D Integrated Circuits
Arbitrary Modeling of TSVs for 3D Integrated Circuits
Author 
Salah, Khaled. author. Ismail, Yehea. author. El-Rouby, Alaa. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07611-9
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11. 
Cover image for Information security architecture : an integrated approach to security in the organization
Information security architecture : an integrated approach to security in the organization
Author 
Tudor, Jan Killmeyer.
Preferred Shelf Number 
QA76.9.A25 T83 2006
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12. 
Cover image for Information security architecture : an integrated approach to security in the organization
Information security architecture : an integrated approach to security in the organization
Author 
Tudor, Jan Killmeyer., author.
Preferred Shelf Number 
QA76.9 .A25 T83 2006
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