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1. 
Cover image for Advanced Flip Chip Packaging
Advanced Flip Chip Packaging
Author 
Tong, Ho-Ming. editor. Lai, Yi-Shao. editor. Wong, C.P. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(330808.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-5768-9
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2. 
Cover image for Routing Algorithms in Networks-on-Chip
Routing Algorithms in Networks-on-Chip
Author 
Palesi, Maurizio. editor. Daneshtalab, Masoud. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-8274-1
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3. 
Cover image for On-chip High-Voltage Generator Design
On-chip High-Voltage Generator Design
Author 
Tanzawa, Toru. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331384.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-3849-6
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4. 
Cover image for Variation Tolerant On-Chip Interconnects
Variation Tolerant On-Chip Interconnects
Author 
Nigussie, Ethiopia Enideg. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-0131-5
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5. 
Cover image for Pipelined Multiprocessor System-on-Chip for Multimedia
Pipelined Multiprocessor System-on-Chip for Multimedia
Author 
Javaid, Haris. author. Parameswaran, Sri. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-01113-4
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6. 
Cover image for CMOS High Efficiency On-chip Power Management
CMOS High Efficiency On-chip Power Management
Author 
Hu, John. author. Ismail, Mohammed. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-9526-1
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7. 
Cover image for System on Chip (SOC) Architecture A Practical Approach
System on Chip (SOC) Architecture A Practical Approach
Author 
Chakravarthi, Veena S. author. Koteshwar, Shivananda R. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-36242-2
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8. 
Cover image for Security Policy in System-on-Chip Designs Specification, Implementation and Verification
Security Policy in System-on-Chip Designs Specification, Implementation and Verification
Author 
Ray, Sandip. author. Basak, Abhishek. author. Bhunia, Swarup. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-93464-8
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9. 
Cover image for Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Author 
Meinerzhagen, Pascal. author. Teman, Adam. author. Giterman, Robert. author. Edri, Noa. author. Burg, Andreas. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-60402-2
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10. 
Cover image for CMOS integrated lab-on-a-chip system for personalized biomedical diagnosis
CMOS integrated lab-on-a-chip system for personalized biomedical diagnosis
Author 
Yu, Hao, 1976- author.
Preferred Shelf Number 
RA856.4
Electronic Access 
https://onlinelibrary.wiley.com/doi/book/10.1002/9781119218333
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11. 
Cover image for Analysis and Design of Networks-on-Chip Under High Process Variation
Analysis and Design of Networks-on-Chip Under High Process Variation
Author 
Ezz-Eldin, Rabab. author. El-Moursy, Magdy Ali. author. Hamed, Hesham F. A. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-25766-2
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12. 
Cover image for Wafer-Level Chip-Scale Packaging Analog and Power Semiconductor Applications
Wafer-Level Chip-Scale Packaging Analog and Power Semiconductor Applications
Author 
Qu, Shichun. author. Liu, Yong. author. SpringerLink (Online service)
Preferred Shelf Number 
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Electronic Access 
https://doi.org/10.1007/978-1-4939-1556-9
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