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1. 
Cover image for Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Author 
Sachdev, Manoj. editor. Gyvez, José Pineda de. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-46547-2
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2. 
Cover image for CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
Author 
Pavlov, Andrei. author. Sachdev, Manoj. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-8363-1
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3. 
Cover image for Thermal and Power Management of Integrated Circuits
Thermal and Power Management of Integrated Circuits
Author 
Vassighi, Arman. author. Sachdev, Manoj. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-29749-9
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4. 
Cover image for ESD Protection Device and Circuit Design for Advanced CMOS Technologies
ESD Protection Device and Circuit Design for Advanced CMOS Technologies
Author 
Semenov, Oleg. author. Sarbishaei, Hossein. author. Sachdev, Manoj. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-8301-3
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